Engineers Harness ChatGPT4 to Engineer Brain-Inspired Chips
Johns Hopkins University’s electrical and computer engineers are trailblazing a novel approach to crafting neural network chips—neuromorphic accelerators poised to fuel energy-efficient, real-time machine intelligence for next-gen embodied systems like autonomous vehicles and robots. Leveraging natural language prompts and ChatGPT4, electrical and computer engineering graduate student Michael Tomlinson and undergraduate Joe Li, both members of the Andreou Lab, meticulously orchestrated detailed instructions to fabricate a spiking neural network chip, mirroring the functionality of the human brain.
Guided by step-by-step prompts to ChatGPT4, commencing with emulating a single biological neuron and progressively intertwining more neurons to form a network, they conceived a comprehensive chip design ready for fabrication.
Described as the inaugural AI chip designed by a machine utilizing natural language processing, the process bears semblance to instructing the computer to “Create an AI neural network chip,” yielding a manufacturing-ready file, as elucidated by Andreas Andreou, professor of electrical and computer engineering and co-founder of the Center for Language and Speech Processing, alongside membership in the Kavli Neuroscience Discovery Institute and Johns Hopkins’ new Data Science and AI Institute.
Initiated during the 2023 Neuromorphic Cognition Engineering Workshop, the endeavor is documented on the preprint site arXiv.
The chip’s final network architecture resembles a compact silicon brain, comprising two layers of interconnected neurons. Users can fine-tune connection strengths via an 8-bit addressable weight system, enabling the chip to configure learned weights dictating its functionality and behavior.
Reconfiguration and programmability are facilitated through a user-friendly interface dubbed the Standard Peripheral Interface (SPI) sub-system, also devised by ChatGPT using natural language prompts.
Tomlinson elucidated that they conceived a rudimentary neural network chip sans intricate coding as proof of concept. Before dispatching the chip for manufacturing, the team rigorously validated its functionality through extensive software simulations, ensuring compliance with intended specifications and facilitating iterative refinement and issue resolution.
The final chip design was electronically dispatched to the Skywater “foundry,” a chip fabrication service, where it presently undergoes manufacturing via a relatively economical 130-nanometer CMOS process.
While constituting a modest stride towards large-scale automatically synthesized practical hardware AI systems, the endeavor underscores AI’s potential in crafting advanced AI hardware systems, expediting AI technology development and deployment, as affirmed by Tomlinson.
He emphasized, “Over the past 20 years, the semiconductor industry has made significant strides in scaling down feature sizes on computer chips, enabling more complex designs in the same silicon area. These advancements, in turn, support sophisticated software Computer-Aided Design algorithms and the creation of advanced computing hardware, fueling the exponential growth in computing power driving today’s AI revolution.”
